Zhewen Pan
University of Wisconsin-Madison Ph.D. Candidate
zhewen.pan@wisc.edu
Bio
Zhewen Pan is a fourth-year Ph.D. student in ECE Deparment at the University of Wisconsin–Madison, advised by Prof. Joshua San Miguel.
Her research focuses on power-efficient computer architecture and sustainable computing. Her work has been recognized with an IEEE Top Pick Honorable Mention, an ISCA Best Paper Honorable Mention, an ASPLOS Distinguished Artifact Award, and an ACM SIGMICRO Student Research Competition gold medal. She is a recipient of the Google PhD fellowship in 2025.
Areas of Research
- Computer Architecture
Exploiting Value Characteristics for Efficient and Sustainable Computer Architecture
Escalating scale and complexity are pushing modern computing systems to their limits. In our work, we take a value-centric view of computer architecture: rather than simply treating data as bits, we explicitly exploit properties of the values themselves to unlock efficiency. We demonstrate that values expose (i) new parallelism, (ii) cross-layer redundancy, and (iii) tolerance to distortion, each enabling distinct architectural gains. First, we introduce value-level parallelism for AI acceleration: when many inputs repeat, it is more efficient to compute results for unique values once and share them across matches. My Carat architecture embodies this principle, reducing arithmetic operations and enabling multiplier-free GEMM acceleration by computing on unique values and broadcasting results to subscribers. Second, we reveal and harness inter-line value similarity in memory hierarchies. With the XOR Cache, we convert redundancy across cache lines, especially duplicates across levels, into compressibility, achieving higher effective capacity than traditional per-line compressors by reshaping data to be compression-friendly. Finally, we will extend this approach to investigate sustainable architecture and system design, where value distortion tolerance is leveraged to mitigate the effects of hardware aging and reduce embodied carbon through lifetime extension. Together, these ideas pave the way for architectures that move past performance-first design toward efficient, value-aware computing.