Jiaxin Lin
The University of Texas at Austin
jxlin@utexas.edu
Bio
iaxin Lin is a sixth-year Ph.D. student at the University of Texas Austin, working with Prof. Aditya Akella. She specializes in computer networks and systems, and her research spans from programmable network hardware, host networking, to accelerator compilers. Jiaxin is the recipient of the 2021 Meta Ph.D. Fellowship and the 2023 Google Ph.D. Fellowship. Her ultimate goal is to influence both academia and industry. To foster this, all her research outcomes are open-sourced to assist future researchers in enhancing SmartNIC technologies. She has also engaged in significant industry outreach, including invited talks at the SmartNICs Summit, and the OCP Global Summit.
Areas of Research
- Communications and Networking
Building the SmartNIC-Aware System for Future Data Centers
Data center systems face efficiency challenges in running network applications due to the substantial computational overhead of processing network packets. Emerging Smart Network Interface Cards (SmartNICs), which enhance NICs with specialized compute units and memory, address this problem by offloading network computation, improving performance and efficiency. My research aims to redefine the role of SmartNICs from being mere accelerators to becoming integral components of the network computing infrastructure. To achieve this vision, two key advancements are necessary. First, there is a need for more flexible deployment models. Today’s SmartNICs typically follow a “single target, single-tenant” deployment model. Future deployments should support multiple tenants and enable program portability across various vendor platforms. Second, it is crucial to empower emerging applications, such as data analytics, RPC services, and distributed training, to effectively leverage SmartNICs’ computational resources while adapting to the hardware constraints inherent in NICs. My research enables SmartNICs to achieve the above properties by building a new NIC-aware system stack spanning hardware, interfaces, and compilers to applications. First, to facilitate the deployment of SmartNICs, I tailor classic system design principles to align with SmartNICs’ unique architectural features and performance demands. This involves developing a new NIC architecture to support multi-tenant isolation, designing a programming framework to achieve portable NIC programming, and a performance model that reasons about NICs’ performance. Next, to enable new application offloads while navigating NICs’ constraints, I move away from the traditional self-contained design model and propose a paradigm shift in the division of labor between the host and NIC. This includes a new RPC orchestration function offload and an NIC-host interface where the NIC and host work cooperatively; an analytics shuffle offload library that tolerates offloads exceeding NICs’ compute and memory limits.